first asymmetrical, dual-core digital signal controller featuring cortex-m4 & cortex-m0 key features ` ` 180 ` mhz,` 32-bit` arm` cortex-m4 ` ` 180 ` mhz,` 32-bit` arm` cortex-m0` coprocessor ` ` up ` to`1` mb` dual-bank` flash ` ` up ` to` 264` kb` sram ` ` up ` to`4` kb` eeprom ` ` memory ` protection` unit` (mpu) ` ` ` two ` high-speed ` usb ` 2.0 ` interfaces, ` with ` on-chip ` high-speed ` phy ` ` 10/100t ` ethernet` mac` with` mii` and` rmii` interfaces ` ` lcd ` controller` with` 1024`x` 768` pixel` display` resolution ` ` innovative ` quad` spi` flash` interface` (spifi) ` ` state ` confgurable` timer` (sct)` subsystem ` ` confgurable ` serial` gpio ` ` two ` can` 2.0b` ` ` aes ` decryption` with` 128-bit` secure` otp` key` storage ` ` up ` to` 164` gpio` ` ` pin-compatible ` with` the` lpc1800` series additional features ` ` 8-channel ` gpdma` controller ` ` two ` 8-channel,` 400` ksps` 10-bit` adcs` and` one` 10-bit` dac ` ` motor ` control` pwm` and` quadrature` encoder` interface ` ` four ` uarts,` smart` card` interface a` dual-core` architecture` and`a` unique` set` of` confgurable` peripherals` make` it` possible` to` develop` dsp ` and` mcu` applications` within`a` single` architecture` and` development` environment.` ` ` two ` fast-mode`i 2 c, ` two`i 2 s, ` three` ssp/spi ` ` temperature ` range:` C40` to` +85` oc ` ` high performance and lower power combined ` with` large` accelerated` flash` and` sram` memories` and `a` set` of` unique` confgurable` peripherals,` the` 150` mhz` lpc4300 ` enables` customers` to` develop`a` wide` range` of` applications ` such` as` motor` control,` power` management,` industrial ` automation,` robotics,` medical,` automotive` accessories ` and` embedded` audio.` combining mcu and dsp capabilities the ` cortex-m4` processor` combines` the` benefts` of`a` microcontroller `C` integrated` interrupt` control,` low` power` modes, ` low` cost` debug` and` ease` of` use`C` with` high- performance ` digital` signal` processing` features` such`` as ` single-cycle` mac,` single` instruction` multiple` data` (simd)` techniques, ` saturating` arithmetic,` and`a` foating` point` unit.` a` cortex-m0 ` coprocessor ` offoads ` many ` of ` the ` data ` movement ` and ` i/o` handling` duties` that` can` drain` the` bandwidth` of` the` cortex-m4 ` core.` this` allows` the` cortex-m4` to` concentrate` fully` on ` crunching` numbers` for` digital` signal` control` applications. nxp 180 mhz, 32-bit cortex-m4 /cortex-m0 dsc lpc4300 series
www.nxp.com ? 2011 nxp semiconductors n.v. all rights reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. date of release: august 2011 document order number: 9397 750 17139 printed in the netherlands extensive peripheral set 4p k hcr k psodhpck o4hppk epk ieegsoipk wphiw4phspck sk pmidppk k vpsc4k eophslpuksk osopk hgedhsdppk iphk cddccop k seuk phispk k 4pk osopk hgedhsdppk iphk ddccop k lgecicock gksk oiphk shhsk io4ksk cosopk sl4iepk pesdpie k lgwppmk deloigespiouk ielpduiek ppeoalgeohgpppuk f k spghk pephsoigeuk nhk cel4hgeitsoigeuk seukk upsuaoip k lgeohgpk 4pk k vpsc4k eophslpk whgiupcksk cpsppcck k 4i4acwppu k pghaswwpuk lgeeploigek ogk ihodsppk sppk k seu k dsuak sedslodhphck 4pk hcr ck phispk uk ssipsdpp k ghk o4pk hcok oipuk sppgcksk upppgwphk o4pk pmidipiokk og k ieophslpk ogk sek egeacoseushuk cphispk ieophslpk ghk ogk iilk dpoiwpp k coseushuk cphispk ieophslpck cdl4k sck s u k fk ghk dpoia l4seepp k sduiguk s hk seuk ghp nuuioigesp k wphiw4phspc k ssipsdpp k ge k o4p k hcr k ielpdupk ogk a k bmk lgeohgppphcuk sek geal4iwk ak auksk e e k o4phepok lgeohgppph k io4k 4shushpk pesdppuk hk l4plxcdk lspldpsoigeuk sk 4i4ahpcgpdoigek lgpghk hk lgeohgppphuk seuk nk uplhwoigeuk ielpduie k ogk esyadiok cpldhpk k pghipck ghk xpk coghspk phcigec k io4k nk pelhwoigek shpk ssipsdppk gek hpdpco type memory m4/m0 lcd ethernet usb state confg timer serial gpio external bus interface temp. range options package flash ram goxmis iur f sw fff fff fff rciu f cxsf dgf rf o ff egixxy f rwuiss goxmie ie isx f sw fff fff fff rciu f cxsf dgf rf o ff egixxy f rwuiss goxmim euce isx f sw fff fff fff rciu f cxsf dgf rf o ff egixxy f rwuiss goxmi ur imu f sw fff fff fff rciu f cxsf dgf rf o ff egixxy f rwuiss goxmi isex imu f sw fff fff fff rciu f cxsf dgf rf o ff egixxy f rwuiss goxmes ess f sw fff i fff fff rciu f cxsf dgf rf o ff egixxy f rwuiss yf egiss goxmee ie isx f sw fff i fff fff rciu f cxsf dgf rf o ff egixxy f rwuiss goxmem euce isx f sw fff i fff fff rciu f cxsf dgf rf o ff egixxy f rwuiss goxme ur imu f sw fff i fff fff rciu f cxsf dgf rf o ff egixxy f rwuiss goxme isex imu f sw fff i fff fff rciu f cxsf dgf rf o ff egixxy f rwuiss yf egiss goxmms eux f sw fff fff e fff fff iucme f cxsf dgf rf o ff wueuy f wuirsyf egixxyf wuiss goxmmm ie imu f sw fff fff e fff fff iucme f cxsf dgf rf o ff wueuy f wuirsyf egixxyf wuiss goxmm isex imu f sw fff fff e fff fff iucme f cxsf dgf rf o ff wueuy f wuirsyf egixxyf wuiss goxms eux f sw fff fff fff e fff fff iucme f cxsf dgf rf o ff egesry f wueuyf wuirs goxmm ie imu f sw fff fff fff e fff fff iucme f cxsf dgf rf o ff egesry f wueuyf wuirs goxm isex f beciek imu f sw fff fff fff e fff fff iucme f cxsf dgf rf o ff egesry f wueuyf wuirs lc4mgii,mngmgldng//fn& lpc43xx
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